the line sooner, to output a 1,

Asserts

Asserts the line later, to output a 0,

its output, allowing the target to drive the line. The host can sense a 1 or 0 as an input value.

Tri-states

The signals used by BDM to communicate data to and from the target are initiated by the host processor. The host negates the transmission line, and then either


At the start of the next bit time, the host negates the transmission line, and the process repeats. Each bit is communicated in this manner.


In other words, the increasing complexity of today's software and hardware designs is leading to some fresh approaches to debugging. Silicon manufacturers offer more and more on-chip debugging features for emulation of new processors.


This capability, implemented in various processors under such names as background debug mode (BDM), JTAG and on-chip in-circuit emulation, puts basic debugging functions on the chip itself. With a BDM (1 wire interface) or JTAG (standard JTAG) debug port, you control and monitor the microcontroller solely through the stable on-chip debugging services.


This debugging mode runs even when the target system crashes and enables developers to continue investigating the cause of the crash.

Microcontroller application development[edit]

A good development tool environment is important to reduce total development time and cost. Users want to debug their application program under conditions that imitate the actual setup of their system. Because of that, the capability to debug a user program in an actual target system is required. This is known as in-circuit debugging. Furthermore, most new MCUs have nonvolatile memory such as flash memory so that programming code on the target system is also required. This is known as in-circuit programming.


To support in-circuit debugging and programming requirements, the HC08 Family has the monitor mode and the HCS08 and RS08 utilize a background debug mode (BDM). The background debug hardware on the HCS08 consists of a background debug controller (BDC) and debug module (DBG). The background debug hardware on the RS08 consists of the background debug controller (BDC) only.

BDM functions[edit]

Depending on the target part, the BDM controller may feature a hardware breakpoint register. The register holds a value indicating an address in memory. When the target part's CPU accesses that location in memory, the BDM hardware can take control of the target part, stop program execution, and begin operating in background mode.

Freescale Semiconductor Inc.

MC9RS08KA2 Data Sheet (MC9RS08KA2, Rev. 4.0)

Freescale Semiconductor Inc.

CPU12 Reference Manual

Freescale Semiconductor Inc.

CPU12 Reference Manual

Freescale Semiconductor Inc.

RS08 Core Reference Manual

Freescale Semiconductor Inc.

RS08 Core Reference Manual

Freescale Semiconductor Inc.

HCS08 Family Reference Manual

Freescale Semiconductor Inc.

HCS08 Family Reference Manual