Katana VentraIP

S/PDIF

S/PDIF (Sony/Philips Digital Interface)[1][2] is a type of digital audio interface used in consumer audio equipment to output audio over relatively short distances. The signal is transmitted over either a coaxial cable using RCA or BNC connectors, or a fiber-optic cable using TOSLINK connectors. S/PDIF interconnects components in home theaters and other digital high-fidelity systems.

S/PDIF is based on the AES3 interconnect standard.[3] S/PDIF can carry two channels of uncompressed PCM audio or compressed 5.1 surround sound (such as DTS audio codec or Dolby Digital codec); it cannot support lossless surround formats that require greater bandwidth.[4]


S/PDIF is a data link layer protocol as well as a set of physical layer specifications for carrying digital audio signals over either optical or electrical cable. The name stands for Sony/Philips Digital Interconnect Format but is also known as Sony/Philips Digital Interface. Sony and Philips were the primary designers of S/PDIF. S/PDIF is standardized in IEC 60958 as IEC 60958 type II (IEC 958 before 1998).[5]

Applications[edit]

A common use is to carry two channels of uncompressed digital audio from a CD player to an amplifying receiver.


The S/PDIF interface is also used to carry compressed digital audio for surround sound as defined by the IEC 61937 standard. This mode is used to connect the output of a Blu-ray, DVD player or computer, via optical or coax, to a home theatre amplifying receiver that supports Dolby Digital or DTS decoding.

The control word bit 0:1 is set to indicate the presence of non-linear-PCM data.

The sample rate is set to maintain the needed symbol (data) rate. The symbol rate is usually 64 times the sample rate.

Data is packed into blocks. Each data block is given a IEC 61937 preamble, containing two 16-bit sync words and indicating the state and identity (type, validity, bitstream number, length) of encapsulated data present. Padding is added to match full block size as required by timing.

Limitations[edit]

The receiver does not control the data rate, so it must avoid bit slip by synchronizing its reception with the source clock. Many S/PDIF implementations cannot fully decouple the final signal from influence of the source or the interconnect. Specifically, the process of clock recovery used to synchronize reception may produce jitter.[13][14][15] If the DAC does not have a stable clock reference then noise will be introduced into the resulting analog signal. However, receivers can implement various strategies that limit this influence.[15][16]

ADAT Lightpipe

I2S

McASP

S/PDIF at Epanorama.net

at the Wayback Machine (archived 2022-09-11)

S/PDIF at hardwarebook.net

More about channel data bits

Interfacing AES3 and S/PDIF