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x86-64

x86-64 (also known as x64, x86_64, AMD64, and Intel 64)[note 1] is a 64-bit version of the x86 instruction set, first announced in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging mode.

"Intel 64" redirects here. For the Intel 64-bit architecture in Itanium chips, see IA-64.

With 64-bit mode and the new paging mode, it supports vastly larger amounts of virtual memory and physical memory than was possible on its 32-bit predecessors, allowing programs to store larger amounts of data in memory. x86-64 also expands general-purpose registers to 64-bit, and expands the number of them from 8 (some of which had limited or fixed functionality, e.g. for stack management) to 16 (fully general), and provides numerous other enhancements. Floating-point arithmetic is supported via mandatory SSE2-like instructions, and x87/MMX style registers are generally not used (but still available even in 64-bit mode); instead, a set of 16 vector registers, 128 bits each, is used. (Each register can store one or two double-precision numbers or one to four single-precision numbers, or various integer formats.) In 64-bit mode, instructions are modified to support 64-bit operands and 64-bit addressing mode.


The compatibility mode defined in the architecture allows 16-bit and 32-bit user applications to run unmodified, coexisting with 64-bit applications if the 64-bit operating system supports them.[11][note 2] As the full x86 16-bit and 32-bit instruction sets remain implemented in hardware without any intervening emulation, these older executables can run with little or no performance penalty,[13] while newer or modified applications can take advantage of new features of the processor design to achieve performance improvements. Also, a processor supporting x86-64 still powers on in real mode for full backward compatibility with the 8086, as x86 processors supporting protected mode have done since the 80286.


The original specification, created by AMD and released in 2000, has been implemented by AMD, Intel, and VIA. The AMD K8 microarchitecture, in the Opteron and Athlon 64 processors, was the first to implement it. This was the first significant addition to the x86 architecture designed by a company other than Intel. Intel was forced to follow suit and introduced a modified NetBurst family which was software-compatible with AMD's specification. VIA Technologies introduced x86-64 in their VIA Isaiah architecture, with the VIA Nano.


The x86-64 architecture was quickly adopted for desktop and laptop personal computers and servers which were commonly configured for 16 GiB (gibibytes) of memory or more. It has effectively replaced the discontinued Intel Itanium architecture (formerly IA-64), which was originally intended to replace the x86 architecture. x86-64 and Itanium are not compatible on the native instruction set level, and operating systems and applications compiled for one architecture cannot be run on the other natively.

VIA's x86-64 implementation[edit]

VIA Technologies introduced their first implementation of the x86-64 architecture in 2008 after five years of development by its CPU division, Centaur Technology.[38] Codenamed "Isaiah", the 64-bit architecture was unveiled on January 24, 2008,[39] and launched on May 29 under the VIA Nano brand name.[40]


The processor supports a number of VIA-specific x86 extensions designed to boost efficiency in low-power appliances. It is expected that the Isaiah architecture will be twice as fast in integer performance and four times as fast in floating-point performance as the previous-generation VIA Esther at an equivalent clock speed. Power consumption is also expected to be on par with the previous-generation VIA CPUs, with thermal design power ranging from 5 W to 25 W.[41] Being a completely new design, the Isaiah architecture was built with support for features like the x86-64 instruction set and x86 virtualization which were unavailable on its predecessors, the VIA C7 line, while retaining their encryption extensions.

Intel 64's and BSR instructions act differently than AMD64's when the source is zero and the operand size is 32 bits. The processor sets the zero flag and leaves the upper 32 bits of the destination undefined. Note that Intel documents that the destination register has an undefined value in this case, but in practice in silicon implements the same behaviour as AMD (destination unmodified). The separate claim about maybe not preserving bits in the upper 32 has not been verified, but has only been ruled out for Core 2 and Skylake,[48] not all Intel microarchitectures like 64-bit Pentium 4 or low-power Atom.

BSF

AMD64 requires a different microcode update format and control MSRs (model-specific registers), while Intel 64 implements update unchanged from their 32-bit only processors.

microcode

Intel 64 lacks some MSRs that are considered architectural in AMD64. These include SYSCFG, TOP_MEM, and TOP_MEM2.

Intel 64 allows SYSCALL/SYSRET only in 64-bit mode (not in compatibility mode), and allows SYSENTER/SYSEXIT in both modes.[50] AMD64 lacks SYSENTER/SYSEXIT in both sub-modes of long mode.[11]: 33 

[49]

In 64-bit mode, near branches with the 66H (operand size override) prefix behave differently. Intel 64 ignores this prefix: the instruction has a 32-bit sign extended offset, and instruction pointer is not truncated. AMD64 uses a 16-bit offset field in the instruction, and clears the top 48 bits of instruction pointer.

On Intel 64 but not AMD64, the REX.W prefix can be used with the far-pointer instructions (LFS, LGS, LSS, JMP FAR, CALL FAR) to increase the size of their argument to 80 bits (64-bit offset + 16-bit segment).

far pointer

Intel 64 lacks the ability to save and restore a reduced (and thus faster) version of the state (involving the FXSAVE and FXRSTOR instructions).

floating-point

AMD processors ever since Rev. E and Athlon 64 Rev. D have reintroduced limited support for segmentation, via the Long Mode Segment Limit Enable (LMSLE) bit, to ease virtualization of 64-bit guests.[51][52] LMLSE support was removed in the Zen 3 processor. [53]

Opteron

When returning to a non-canonical address using SYSRET, AMD64 processors execute the general protection fault handler in privilege level 3, while on Intel 64 processors it is executed in privilege level 0.[55]

[54]

speculation

8 TiB of virtual address space per process, accessible from both user mode and kernel mode, referred to as the user mode address space. An x64 program can use all of this, subject to backing store limits on the system, and provided it is linked with the "large address aware" option, which is present by default. This is a 4096-fold increase over the default 2 GiB user-mode virtual address space offered by 32-bit Windows.[107][108]

[106]

8 TiB of kernel mode virtual address space for the operating system. As with the user mode address space, this is a 4096-fold increase over 32-bit Windows versions. The increased space primarily benefits the file system cache and kernel mode "heaps" (non-paged pool and paged pool). Windows only uses a total of 16 TiB out of the 256 TiB implemented by the processors because early AMD64 processors lacked a CMPXCHG16B instruction.[109]

[107]

Video game consoles[edit]

Both the PlayStation 4 and Xbox One, and all variants of those consoles, incorporate AMD x86-64 processors, based on the Jaguar microarchitecture.[116][117] Firmware and games are written in x86-64 code; no legacy x86 code is involved.


The current generation, the PlayStation 5 and the Xbox Series X and Series S respectively, also incorporate AMD x86-64 processors, based on the Zen 2 microarchitecture.[118][119]


Although considered a PC, the Steam Deck uses a custom AMD x86-64 accelerated processing unit (APU), based on the Zen 2 microarchitecture.[120]

amd64

BSD

x86_64

Linux kernel

Since AMD64 and Intel 64 are substantially similar, many software and hardware products use one vendor-neutral term to indicate their compatibility with both implementations. AMD's original designation for this processor architecture, "x86-64", is still used for this purpose,[2] as is the variant "x86_64".[3][4] Other companies, such as Microsoft[6] and Sun Microsystems/Oracle Corporation,[5] use the contraction "x64" in marketing material.


The term IA-64 refers to the Itanium processor, and should not be confused with x86-64, as it is a completely different instruction set.


Many operating systems and products, especially those that introduced x86-64 support prior to Intel's entry into the market, use the term "AMD64" or "amd64" to refer to both AMD64 and Intel 64.

Licensing[edit]

x86-64/AMD64 was solely developed by AMD. AMD holds patents on techniques used in AMD64;[123][124][125] those patents must be licensed from AMD in order to implement AMD64. Intel entered into a cross-licensing agreement with AMD, licensing to AMD their patents on existing x86 techniques, and licensing from AMD their patents on techniques used in x86-64.[126] In 2009, AMD and Intel settled several lawsuits and cross-licensing disagreements, extending their cross-licensing agreements.[127][128][129]

(AGESA)

AMD Generic Encapsulated Software Architecture

Transient execution CPU vulnerability

AMD Developer Guides, Manuals & ISA Documents

– technical talk by the architect of AMD64 (video archive), and second talk by the same speaker (video archive)

x86-64: Extending the x86 architecture to 64-bits

AMD's "Enhanced Virus Protection"

Intel tweaks EM64T for full AMD64 compatibility

Analyst: Intel Reverse-Engineered AMD64

Early report of differences between Intel IA32e and AMD64

by Andreas Jaeger from GCC Summit 2003. An excellent paper explaining almost all practical aspects for a transition from 32-bit to 64-bit.

Porting to 64-bit GNU/Linux Systems

Intel 64 Architecture

Intel Software Network: "64 bits"

TurboIRC.COM tutorials, including examples of how to of enter protected and long mode the raw way from DOS

Seven Steps of Migrating a Program to a 64-bit System

Memory Limits for Windows Releases