Katana VentraIP

Serial Peripheral Interface

Serial Peripheral Interface (SPI) is a de facto standard (with many variants) for synchronous serial communication, used primarily in embedded systems for short-distance wired communication between integrated circuits.

Type

Around early 1980s[note 1]

various

Depends on devices

Unspecified

Unspecified

Unspecified

1 bit (bidirectional)

Multidrop limited by chip selects. Daisy chaining unlimited.

Master Out Slave In

Master In Slave Out

Serial Clock

Chip Select (one or more)

SPI uses a master–slave architecture, described here with the terms "main" and "sub",[note 2] [1] where one[note 3] main device orchestrates communication with some number of peripheral (sub) devices by driving the clock signal and chip select signal(s).


Motorola's original specification (early 1980s) uses four wires to perform full duplex communication. It is sometimes called a four-wire serial bus to contrast with three-wire variants which are half duplex, and with the two-wire I²C and 1-Wire serial buses.


Typical applications include interfacing microcontrollers with peripheral chips for Secure Digital cards, liquid crystal displays, analog-to-digital and digital-to-analog converters, flash and EEPROM memory, and various communication chips.


SPI may be accurately described as a synchronous serial interface,[2] but it is different from the Synchronous Serial Interface (SSI) protocol.[note 4]

logical low

Full duplex communication in the default version of this protocol

(as opposed to open drain) provide relatively good signal integrity and high speed

Push-pull drivers

address

Sensors: , pressure, ADC, touchscreens, video game controllers

temperature

Control devices: , digital potentiometers, DACs

audio codecs

Camera lenses:

Canon EF lens mount

Communications: , USB, USART, CAN, IEEE 802.15.4, IEEE 802.11

Ethernet

Memory: and EEPROMs

flash

Real-time clocks

sometimes even for managing image data

LCDs

Any or SD card (including SDIO variant[note 8])

MMC

for additional I/O[8][9]

Shift registers

SPI is used to talk to a variety of peripherals, such as


Board real estate and wiring savings compared to a parallel bus are significant, and have earned SPI a solid role in embedded systems. That is true for most system-on-a-chip processors, both with higher-end 32-bit processors such as those using ARM, MIPS, or PowerPC and with lower-end microcontrollers such as the AVR, PIC, and MSP430. These chips usually include SPI controllers capable of running in either main or sub mode. In-system programmable AVR controllers (including blank ones) can be programmed using SPI.[12]


Chip or FPGA based designs sometimes use SPI to communicate between internal components; on-chip real estate can be as costly as its on-board cousin. And for high-performance systems, FPGAs sometimes use SPI to interface as a sub to a host, as a main to sensors, or for flash memory used to bootstrap if they are SRAM-based.


The full-duplex capability makes SPI very simple and efficient for single main/single sub applications. Some devices use the full-duplex mode to implement an efficient, swift data stream for applications such as digital audio, digital signal processing, or telecommunications channels, but most off-the-shelf chips stick to half-duplex request/response protocols.

Dual read commands the send and address from the main in single mode, and return the data in dual mode.

Dual I/O commands send the command in single mode, then send the address and return data in dual mode.

Development tools[edit]

Single-board computers[edit]

Single-board computers may provide pin access to SPI hardware units. For instance, the Raspberry Pi's J8 header exposes at least two SPI units that can be used via Linux drivers or python.

USB to SPI adapters[edit]

There are a number of USB adapters that allow a desktop PC or smartphone with USB to communicate with SPI chips (e.g. FT221xs[33]). They are used for embedded systems, chips (FPGA, ASIC, and SoC) and peripheral testing, programming and debugging. Many of them also provide scripting or programming capabilities (e.g. Visual Basic, C/C++, VHDL).


The key SPI parameters are: the maximum supported frequency for the serial interface, command-to-command latency, and the maximum length for SPI commands. It is possible to find SPI adapters on the market today that support up to 100 MHz serial interfaces, with virtually unlimited access length.


SPI protocol being a de facto standard, some SPI host adapters also have the ability of supporting other protocols beyond the traditional 4-wire SPI (for example, support of quad-SPI protocol or other custom serial protocol that derive from SPI[34]).

[36]

[36]

SS

The term "master" is commonly used to identify the main device and "slave" for peripheral (sub) devices. These terms reflect how the main device is responsible for driving the serial clock and initiating communication: peripheral devices are only able to communicate when the main device is driving the clock.


Various more contemporary alternative names for each of the four signals have been proposed:


Microchip uses "Host" and "Client" though keeps the abbreviation MOSI and MISO.[39]

List of network buses

Intel eSPI (Enhanced Serial Peripheral Interface)

SPI Tutorial